STOC 1984
Finding Euler Circuits in Logarithmic Parallel Time
Abstract
A parallel algorithm for finding Euler circuits in graphs is presented. Its depth is log |E| and it employs |E| processors. The computational model considered is the PRAM (the shared memory model).
Authors
Keywords
No keywords are indexed for this paper.
Context
- Venue
- ACM Symposium on Theory of Computing
- Archive span
- 1969-2025
- Indexed papers
- 4364
- Paper id
- 1148842038664484544