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SAT 2011

Minimally Unsatisfiable Boolean Circuits

Conference Paper Extraction of Minimal Unsatisfiable Subsets Logic in Computer Science · Satisfiability

Abstract

Abstract Automated reasoning tasks in many real-world domains involve analysis of redundancies in unsatisfiable instances of SAT. In CNF-based instances, some of the redundancies can be captured by computing a minimally unsatisfiable subset of clauses (MUS). However, the notion of MUS does not apply directly to non-clausal instances of SAT, particularly those that are represented as Boolean circuits. In this paper we identify certain types of redundancies in unsatisfiable Boolean circuits, and propose a number of algorithms to compute minimally unsatisfiable, that is, irredundant, subcircuits.

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Context

Venue
International Conference on Theory and Applications of Satisfiability Testing
Archive span
2003-2025
Indexed papers
824
Paper id
1002161642500924214
v2026.09.13