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SAT 2025

Bit-Precise Reasoning with Parametric Bit-Vectors

Conference Paper Accepted Paper Logic in Computer Science ยท Satisfiability

Abstract

The SMT-LIB theory of bit-vectors is restricted to bit-vectors of fixed width. However, several important applications can benefit from reasoning about bit-vectors of symbolic widths, i. e. , parametric bit-vectors. Recent work has introduced an approach for solving formulas over parametric bit-vectors, via an eager translation to quantified integer arithmetic with uninterpreted functions. The approach was shown to be successful for several applications, including the bit-width independent verification of compiler optimizations, invertibility conditions, and rewrite rules. We extend and improve that approach in several aspects. Theoretically, we improve expressiveness by defining a new theory of parametric bit-vectors that supports more operators and allows reasoning about the bit-widths themselves. Algorithmically, we introduce a lazy algorithm that avoids the use of uninterpreted functions and quantified axioms for them. Empirically, we show a significant improvement by implementing and evaluating our approach, and comparing it experimentally to the previous one.

Authors

Keywords

  • Satisfiability Modulo Theories
  • Bit-precise Reasoning
  • Parametric Bit-vectors

Context

Venue
International Conference on Theory and Applications of Satisfiability Testing
Archive span
2003-2025
Indexed papers
824
Paper id
221945109195825129
v2026.09.13