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Highlights 2023

Checking Presence Reachability Properties on Parameterized Shared-Memory Systems

Conference Abstract Proving combinatorial properties of graphs using model theory Logic in Computer Science ยท Theoretical Computer Science

Abstract

We consider the verification of distributed systems composed of an arbitrary number of asynchronous processes. Processes are identical finite-state machines communicating by reading from and writing to a shared memory. Beyond the standard model with finitely many registers, we tackle round-based shared-memory systems with fresh registers at each round. In the latter model, both the number of processes and the number of registers are unbounded, making verification particularly challenging. The properties studied are generic presence reachability objectives that subsume classical questions such as safety or synchronization by expressing the presence or absence of processes in some states. In the more general round-based setting, we establish that the parameterized verification of presence reachability properties is PSPACE-complete. Moreover, for the roundless model with finitely many registers, we prove that the complexity drops down to NP-complete and we provide several natural restrictions that make the problem solvable in polynomial time. Contributed talk given by Nicolas Waldburger

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Context

Venue
Highlights of Logic, Games and Automata
Archive span
2013-2025
Indexed papers
1236
Paper id
190974676038061250