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An Abstraction Technique For Parameterized Model Checking of Leader Election Protocols: Application to FTSP

Conference Abstract Session 3a – Synthesis & Timed Systems (chair: Véronique Bruyère, room: Forum A) Logic in Computer Science · Theoretical Computer Science

Abstract

We consider distributed timed systems that implement leader election protocols which are at the heart of clock synchronization proto- cols. We develop abstraction techniques for parameterized model check- ing of such protocols under arbitrary network topologies, where nodes have independently evolving clocks. We apply our technique for model checking the root election part of the flooding time synchronisation pro- tocol (FTSP), and obtain improved results compared to previous work. We model check the protocol for all topologies in which the distance to the node to be elected leader is bounded by a given parameter.

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Context

Venue
Highlights of Logic, Games and Automata
Archive span
2013-2025
Indexed papers
1236
Paper id
703105545507795122