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V. Vinay

Possible papers associated with this exact author name in Arrow. This page groups case-insensitive exact name matches and is not a full identity disambiguation profile.

6 papers
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6

FOCS Conference 2008 Conference Paper

Arithmetic Circuits: A Chasm at Depth Four

  • Manindra Agrawal
  • V. Vinay

We show that proving exponential lower bounds on depth four arithmetic circuits imply exponential lower bounds for unrestricted depth arithmetic circuits. In other words, for exponential sized circuits additional depth beyond four does not help. We then show that a complete black-box derandomization of identity testing problem for depth four circuits with multiplication gates of small fanin implies a nearly complete derandomization of general identity testing.

TCS Journal 1998 Journal Article

Non-commutative arithmetic circuits: depth reduction and size lower bounds

  • Eric Allender
  • Jia Jiao
  • Meena Mahajan
  • V. Vinay

We investigate the phenomenon of depth-reduction in commutative and non-commutative arithmetic circuits. We prove that in the commutative setting, uniform semi-unbounded arithmetic circuits of logarithmic depth are as powerful as uniform arithmetic circuits of polynomial degree (and unrestricted depth); earlier proofs did not work in the uniform setting. This also provides a unified proof of the circuit characterizations of the class LOGCFL and its counting variant #LOGCFL. We show that AC1 has no more power than arithmetic circuits of polynomial size and degree n O(log log n) (improving the trivial bound of n O(log n)). Connections are drawn between TC1 and arithmetic circuits of polynomial size and degree. Then we consider non-commutative computation. We show that over the algebra (∑∗, max, concat), arithmetic circuits of polynomial size and polynomial degree can be reduced to O(log 2 n) depth (and even to O(log n) depth if unbounded-fanin gates are allowed). This establishes that OptLOGCFL is in AC1. This is the first depth-reduction result for arithmetic circuits over a non-commutative semiring, and it complements the lower bounds of Kosaraju and Nisan showing that depth reduction cannot be done in the general non-commutative setting. We define new notions called “short-left-paths” and “short-right-paths” and we show that these notions provide a characterization of the classes of arithmetic circuits for which optimal depth reduction is possible. This class also can be characterized using the AuxPDA model. Finally, we characterize the languages generated by efficient circuits over the semiring (2∑∗, union, concat) in terms of simple one-way machines, and we investigate and extend earlier lower bounds on non-commutative circuits.

I&C Journal 1993 Journal Article

A Circuit-Based Proof of Toda′s Theorem

  • R. Kannan
  • H. Venkateswaran
  • V. Vinay
  • A.C. Yao

We present a simple proof of Toda′s result (Toda (1989), in "Proceedings, 30th Annual IEEE Symposium on Foundations of Computer Science, " pp. 514-519), which states that ⊕ P is hard for the Polynomial Hierarchy under randomized reductions. Our approach is circuit-based in the sense that we start with uniform circuit definitions of the Polynomial Hierarchy and apply the Valiant-Vazirani lemma on these circuits (Valiant and Vazirani (1986), Thoeret. Comput. Sci. 47, 85-93).