Author name cluster

Miguel Figueroa

Possible papers associated with this exact author name in Arrow. This page groups case-insensitive exact name matches and is not a full identity disambiguation profile.

6 papers

1 author row

YNIMG Journal 2022 Journal Article

Superficial white matter bundle atlas based on hierarchical fiber clustering over probabilistic tractography data

Claudio Román
Cecilia Hernández
Miguel Figueroa
Josselin Houenou
Cyril Poupon
Jean-François Mangin
Pamela Guevara

The study of short association fibers is still an incomplete task due to their higher inter-subject variability and the smaller size of this kind of fibers in comparison to known long association bundles. However, their description is essential to understand human brain dysfunction and better characterize the human brain connectome. In this work, we present a multi-subject atlas of short association fibers, which was computed using a superficial white matter bundle identification method based on fiber clustering. To create the atlas, we used probabilistic tractography from one hundred subjects from the HCP database, aligned with non-linear registration. The method starts with an intra-subject clustering of short fibers (30-85 mm). Based on a cortical atlas, the intra-subject cluster centroids from all subjects are segmented to identify the centroids connecting each region of interest (ROI) of the atlas. To reduce computational load, the centroids from each ROI group are randomly separated into ten subgroups. Then, an inter-subject hierarchical clustering is applied to each centroid subgroup, followed by a second level of clustering to select the most-reproducible clusters across subjects for each ROI group. Finally, the clusters are labeled according to the regions that they connect, and clustered to create the final bundle atlas. The resulting atlas is composed of 525 bundles of superficial short association fibers along the whole brain, with 384 bundles connecting pairs of different ROIs and 141 bundles connecting portions of the same ROI. The reproducibility of the bundles was verified using automatic segmentation on three different tractogram databases. Results for deterministic and probabilistic tractography data show high reproducibility, especially for probabilistic tractography in HCP data. In comparison to previous work, our atlas features a higher number of bundles and greater cortical surface coverage.

Details DOI

NeurIPS Conference 2007 Conference Paper

Subspace-Based Face Recognition in Analog VLSI

Gonzalo Carvajal
Waldo Valenzuela
Miguel Figueroa

We describe an analog-VLSI neural network for face recognition based on subspace methods. The system uses a dimensionality-reduction network whose coeﬃcients can be either programmed or learned on-chip to per- form PCA, or programmed to perform LDA. A second network with user- programmed coeﬃcients performs classiﬁcation with Manhattan distances. The system uses on-chip compensation techniques to reduce the eﬀects of device mismatch. Using the ORL database with 12x12-pixel images, our circuit achieves up to 85% classiﬁcation performance (98% of an equivalent software implementation).

PDF Details

NeurIPS Conference 2004 Conference Paper

On-Chip Compensation of Device-Mismatch Effects in Analog VLSI Neural Networks

Miguel Figueroa
Seth Bridges
Chris Diorio

Device mismatch in VLSI degrades the accuracy of analog arithmetic circuits and lowers the learning performance of large-scale neural net- works implemented in this technology. We show compact, low-power on-chip calibration techniques that compensate for device mismatch. Our techniques enable large-scale analog VLSI neural networks with learn- ing performance on the order of 10 bits. We demonstrate our techniques on a 64-synapse linear perceptron learning with the Least-Mean-Squares (LMS) algorithm, and fabricated in a 0. 35m CMOS process.

PDF Details

NeurIPS Conference 2002 Conference Paper

Adaptive Quantization and Density Estimation in Silicon

David Hsu
Seth Bridges
Miguel Figueroa
Chris Diorio

We present the bump mixture model, a statistical model for analog data where the probabilistic semantics, inference, and learning rules derive from low-level transistor behavior. The bump mixture model relies on translinear circuits to perform probabilistic infer- ence, and floating-gate devices to perform adaptation. This system is low power, asynchronous, and fully parallel, and supports vari- ous on-chip learning algorithms. In addition, the mixture model can perform several tasks such as probability estimation, vector quanti- zation, classification, and clustering. We tested a fabricated system on clustering, quantization, and classification of handwritten digits and show performance comparable to the E-M algorithm on mix- tures of Gaussians.

PDF Details

NeurIPS Conference 2002 Conference Paper

Field-Programmable Learning Arrays

Seth Bridges
Miguel Figueroa
Chris Diorio
David Hsu

This paper introduces the Field-Programmable Learning Array, a new paradigm for rapid prototyping of learning primitives and machine- learning algorithms in silicon. The FPLA is a mixed-signal counterpart to the all-digital Field-Programmable Gate Array in that it enables rapid prototyping of algorithms in hardware. Unlike the FPGA, the FPLA is targeted directly for machine learning by providing local, parallel, on- line analog learning using ﬂoating-gate MOS synapse transistors. We present a prototype FPLA chip comprising an array of reconﬁgurable computational blocks and local interconnect. We demonstrate the via- bility of this architecture by mapping several learning circuits onto the prototype chip.

PDF Details

NeurIPS Conference 2000 Conference Paper

A Silicon Primitive for Competitive Learning

David Hsu
Miguel Figueroa
Chris Diorio

Competitive learning is a technique for training classification and clustering networks. We have designed and fabricated an 11- transistor primitive, that we term an automaximizing bump circuit, that implements competitive learning dynamics. The circuit per(cid: 173) forms a similarity computation, affords nonvolatile storage, and implements simultaneous local adaptation and computation. We show that our primitive is suitable for implementing competitive learning in VLSI, and demonstrate its effectiveness in a standard clustering task.

PDF Details