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Darko Stefanovic

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2 papers
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2

TCS Journal 2016 Journal Article

Modular verification of chemical reaction network encodings via serializability analysis

  • Matthew R. Lakin
  • Darko Stefanovic
  • Andrew Phillips

Chemical reaction networks are a powerful means of specifying the intended behavior of synthetic biochemical systems. A high-level formal specification, expressed as a chemical reaction network, may be compiled into a lower-level encoding, which can be directly implemented in wet chemistry and may itself be expressed as a chemical reaction network. Here we present conditions under which a lower-level encoding correctly emulates the sequential dynamics of a high-level chemical reaction network. We require that encodings are transactional, such that their execution is divided by a “commit reaction” that irreversibly separates the reactant-consuming phase of the encoding from the product-generating phase. We also impose restrictions on the sharing of species between reaction encodings, based on a notion of “extra tolerance”, which defines species that may be shared between encodings without enabling unwanted reactions. Our notion of correctness is serializability of interleaved reaction encodings, and if all reaction encodings satisfy our correctness properties then we can infer that the global dynamics of the system are correct. This allows us to infer correctness of any system constructed using verified encodings. As an example, we show how this approach may be used to verify two- and four-domain DNA strand displacement encodings of chemical reaction networks, and we generalize our result to the limit where the populations of helper species are unlimited.

NeurIPS Conference 1997 Conference Paper

Learning to Schedule Straight-Line Code

  • J. Moss
  • Paul Utgoff
  • John Cavazos
  • Doina Precup
  • Darko Stefanovic
  • Carla Brodley
  • David Scheeff

Program execution speed on modem computers is sensitive, by a factor of two or more, to the order in which instructions are presented to the proces(cid: 173) sor. To realize potential execution efficiency, an optimizing compiler must employ a heuristic algorithm for instruction scheduling. Such algorithms are painstakingly hand-crafted, which is expensive and time-consuming. We show how to cast the instruction scheduling problem as a learning task, ob(cid: 173) taining the heuristic scheduling algorithm automatically. Our focus is the narrower problem of scheduling straight-line code (also called basic blocks of instructions). Our empirical results show that just a few features are ad(cid: 173) equate for quite good performance at this task for a real modem processor, and that any of several supervised learning methods perform nearly opti(cid: 173) mally with respect to the features used.